Low- Power MIPS 32-Bit ALU: A MGDI-FS Technique with 90 nm Technology

This research introduces an area and energy-efficient Arithmetic Logic Unit (ALU) using Modified Gate Diffusion Input-Full Swing (MGDI-FS) technology. The described ALU is constructed on a 90 nm node using the Cadence Virtuoso Simulator (CVS). It is shown that the ALU outperforms traditional Complementary Metal-Oxide-Semiconductor (CMOS)-based design, and the MGDI-based design in terms of energy efficiency, area, and propagation latency. The suggested 32-bit ALU achieves respective energy efficiencies of 81% and 83 % on the CMOS-based and MGDI models. The scalability of the developed ALU design is tested by expanding the size to 32 bits, which is achieved by constructing 1-bit and 8-bit ALUs by using the proposed MGDI-FS gates.