A VLSI algorithm for direct and reverse conversion from weighted binary number system to residue number system

Residue Number Systems (RNS) are proved to be useful in many applications, as for example in signal processing. In this paper, a VLSI computing architecture is proposed for converting an integer number N from the weighted binary representation into and out a residue code based on s moduli. For this architecture a possible layout is given and its complexity is evaluated in terms of area and time. Under several hypotheses on RNS parameters, constructive upper bounds ranging from
0(n^{2} \log n)
to
0(n^{2}
\log \log n)
and from
0(\log^{2} n)
to
0(\log n)
for area and time, respectively, have been obtained for the direct conversion. On the contrary, constructive upper bounds
A = 0(n^{2} \log n)
and
T = 0(\log^{2} n)
have been found independent of the formed hypotheses, for the reverse conversion.