Negative Capacitance Vertical Dopingless TFET and Its Analog/RF Analysis Using Interface Trap Charges

The increasing demand for low-power devices has developed a huge interest in the Tunnel Field-Effect Transistor (TFET). However, challenges such as low ON current (I $_{\text {ON}}$ ) and random dopant fluctuations limit its demand. To address these limitations, this paper proposed a charge plasma based ferroelectric negative capacitance vertical dopingless TFET (NC-VDL-TFET). In the proposed device, initially, dielectric engineering and architectural modification are used to improve the ION. The simulation result shows that these modifications increased the ION by 16.13%. Afterwards, a silicon-doped HfO2 ferroelectric material is employed above the gate oxide, which results in further improvement of 96.63% in ION. The overall simulation results demonstrate a significant improvement in DC and analog/RF characteristics at a low voltage supply (V $_{\text {DS}} = 0.3$ V), making the proposed device a potential candidate for future integrated circuits. Further, a detailed investigation of interface trap charges (ITCs) on the proposed device is analysed for reliability purposes. The simulated results performed for Analog/RF analysis show the proposed device is immune towards the impact of ITCs.