Linear Active Disturbance Rejection Control-Based Voltage Controller for Buck and Boost DC/DC Converters in DC Distribution Grids

DC distribution grids have recently gained research attention for the efficient integration of converter-interfaced distributed energy resources (DER). This paper presents a voltage controller for the buck and boost DC/DC DER-interfacing converters that operate in voltage control mode, acting as DC grid-forming converters. A linear active disturbance rejection control (L-ADRC) model is proposed, consisting of an augmented Kalman filter for the state and disturbance estimation, an adaptive state reference trajectory generator and a linear quadratic regulator as feedback controller. This L-ADRC model is formulated according to the generalised ADRC concept, making the voltage controller applicable to converters of the non-minimum phase (NMP) class, like the boost DC/DC converters in voltage control mode, and suitable for matched and mismatched disturbances, opposite to the original ADRC, which exists mostly in literature of converter controllers. The formulation of the proposed L-ADRC model in the non-canonical form facilitates the employment of model-based estimation and feedback control methods, whose performance is determined through the design of several parameters. This provides more degrees-of-freedom in the design of the voltage controller, beyond the design of the common L-ADRC formulation based on the bandwidth of the linear extended state observer and the scaling factor of a proportional error feedback controller. In addition, the physical significance of the converter’s states allows the integration of additional control functions, relying on the electrical quantities of the converter, for the enhancement of the performance of the voltage controller. For this, a virtual impedance-based current limiter is integrated in the L-ADRC model, which is necessary for preventing high currents at the converter’s switches. Moreover, the formulation of the adaptive state reference trajectory of the L-ADRC model according to the estimated disturbance provides a smooth state reference to the state feedback controller and enhances the robustness of the voltage controller against disturbances. The L-ADRC is designed based on both frequency and time domain analyses, contrary to the design approaches of ADRC converter controllers in literature. It is validated in a hardware-in-the-loop implementation and the performance is analysed in simulation against a PID voltage controller.