A Power-Area Efficient New Merged Capacitor Switching Scheme for SAR ADC

This article introduces a power-area efficient new merged capacitor switching (NMCS) scheme for successive approximation register (SAR) analog-to-digital converters (ADCs). It addresses the drawback of conventional CDAC switching schemes, where energy is consumed with each decision. In this scheme, energy is consumed during the first decision, no energy is consumed during the second decision, and energy is released during the remaining conversion process. Therefore, the scheme offers the advantage of low average switching energy. In addition, the largest capacitor supports weight configuration as MSB or MSB-1, which effectively reduces the total capacitance. The NMCS scheme has the power efficiency advantage of unidirectional switching and achieves constant common-mode voltage at the beginning and end of the conversion. Taking the example of 10-bit SAR ADC, the proposed NMCS scheme, when driving a single CDAC capacitor array, saves 98.8% of the average switching energy and reduces total capacitance by 75% compared to conventional schemes.