A 19.58-to-21.38-GHz Low-Power Quad-Core VCO with Compact 3rd-Order Q-boost Inductors Achieving -191.8-dBc/Hz FoM and -205.4-dBc/Hz FoMA

In the Internet-of-Things (loT) applications, such as human sensors, robots, and vehicles, which are battery-dependent, optimal mm-Wave-based sensing requires a frequency source with low power consumption, miniaturization, and high signal-to-noise ratio (SNR) [1]. This necessitates a low-jitter and low-power phase-locked loop (PLL). To minimize jitter within a given PLL power budget, balancing power allocation between the loop and the voltage control oscillators (VCO) is required [2]. Since the thermal region phase noise (PN) of VCO dictates the out-band PN of the PLL, it is essential to suppress thermal region PN with a low VCO power budget. Meanwhile, compact size is also significant for low-cost loT applications, hence requiring inductor shrinkage. However, optimizing PN, power, and area simultaneously in traditional single-core VCOs is challenging [3–5], mainly owing to the design trade-off of the inductor between inductance, Q factor, and area. As illustrated in Fig. 1 (middle), designing an inductor with a large L and high Q is highly desirable because the former helps to reduce VCO power while the latter is essential for low PN. Two widely used inductor topologies are presented in Fig. 1 (bottom). The single-coil inductor exhibits a high Q because the large distance between the two sides of the coil causes negligible self-canceling; yet, it is area-inefficient for large L designs. The multi-coil inductor offers a high L with a compact size but suffers from degraded Q caused by the severe self-canceling and parasitic effects, due to the narrow distance between the sides of the coils.