A 273.48 TOPS/W and 1.58 Mb/mm2 Analog-Digital Hybrid CIM Processor with Transpose Ternary-eDRAM Bitcell

Deep neural network acceleration with Computing-in-Memory (CIM) processors [2–8] has been proposed to replace conventional computer architecture for high energy efficiency. However, previous CIM processors have struggled with the following limitations and challenges as shown in Fig. 1: 1) trade-off between cell density and computation linearity 2) trade-off between throughput degradation and analog-to-digital converter (ADC) area/power overheads, and 3) low system energy efficiency.