Optimizing the Threshold Modified Comparator Circuit (TMCC) with NCFET Technology for Low Power and High-Speed Performance

Comparators had been a major part in the design of various applications like ADCs, Relaxations Oscillators, Schmitt trigger, and many more. The design of these comparators have been advancing over the passing years. the main parameters considered while designing of the comparator are area, power consumed, delay in comparing and giving us the output. we have designed a TMCC (Threshold modified comparator circuit) using NCFET (Negative capacitance field effect transistor) and its power consumption, area utilization and delay have been calculated. The proposed TMCC using NCFET technology have been designed using 40 nm technology. It consumes an average power of 3.5 pW and the delay is 1.325 ns. The above-mentioned parameters have been reduced to a major amount by using NCFET while compared to the CMOS technology.