Design and Simulation of 0.3 - 3000 MHz HBT Low Noise Amplifier (LNA) Topologies for More Sensitive Partial Discharge Measurements

This research aims to design and implement a Low Noise Amplifier (LNA) with a frequency range of 0.3 - 3000 MHz to measure Partial Discharge (PD) in high voltage power apparatus. The LNA design considers PD characteristics according to the frequency range of Ultra-High Frequency (UHF) Antennas as the main detectors for PD measurements in accordance with IEC60270 and IEC62478 standards. The proposed LNA uses Heterojunction Bipolar Transistor (HBT) type BFP840ESD transistor. To obtain the characteristics of the LNA, the designs are simulated in the electric circuit design software. The main characteristics to be assessed are gain, bandwidth, voltage standing wave ratio, noise figure, stability, price and incomplexity. Simulations were carried out on four alternative topologies, namely common emitter, common base, cascode, and cascade of cascode. The results show that the last two alternatives were chosen as the final best topology with the main parameters being high gain values (21.79 dB and 34.15 dB) and bandwidth with high upper cutoff frequencies (3.12 GHz and 3.27 GHz) to meet the needs of the Ultra-Wide Band (UWB) UHF Antenna which has a wider bandwidth than the specified standard.