Bulk Damage Effects in Neutron Irradiated Single- and Dual-Layer 150-nm CMOS SPADs

Single- and dual-layer arrays of single-photon avalanche diodes (SPADs) fabricated in a 150-nm CMOS technology have been irradiated with neutrons up to a fluence of $4.29 \times 10 ^{10}~1$ -MeV neutron equivalent cm−2. Neutron irradiation is found to induce a notable rise in the dark count rate (DCR) noise of single-layer chips. The dual-layer configuration is demonstrated to be more robust, showing a comparatively smaller DCR degradation. DCR and breakdown voltage measurements have been performed at various temperatures, ranging from - 40°C to 40°C, both before and after irradiation. While the breakdown voltage is not significantly affected by neutron damage, the average activation energy of the defects responsible for DCR is found to decrease to about 0.2 eV after irradiation. Eventually, a model based on the nonionizing energy loss (NIEL) hypothesis and taking into account damage annealing with time is proposed, providing an accurate estimate of the DCR increase with fluence.