A True Random Number Generator on FPGA with Jitter-Sampling by Ring Generator

True Random Number Generator (TRNG) is an essential primitive for extracting random bits from a random entropy source. A robust and reliable TRNG design provides non-deterministic nonces for cryptographic applications, especially in the secret key generation process. This paper presents an accumulating-jitter-based TRNG design that uses a ring generator to sample high-frequency oscillators and obfuscate the sampled bit. Implemented on the Xilinx Artix-7 Field-Programmable Gate Array (FPGA), the proposed design occupies a minimal hardware footprint of 6 SLICEs. This implementation demonstrates a good balance between hardware cost and throughput of 200Mbps. Moreover, the randomness of the output random sequences in the default mode and at power-up are of high quality, passing the random tests SP800-22 and SP800-90B from NIST and AIS31 standards from BSI.