SiC Wafer Chamfering Process Research

Burrs, cracks, and scratches are often produced on silicon carbide (SiC) wafers during various processing stages, such as rolling and cutting. To address these challenges, edge grinding through chamfering is employed in the initial phases of wafer processing. However, the high hardness and brittleness of SiC crystals present the considerable challenges in chamfering process. This study investigates the effects of various process parameters on chamfering of SiC wafers. The face width and edge profile after optimized SiC wafer chamfering are given. Furthermore, adjustments were made to the single cutter feed rates and grinding speeds to reduce chipping associated with the chamfering process. The results demonstrated a significant enhancement in chip quality when the single tool feed rate was maintained between 0.015-0.02 mm/tool, with grinding speeds set 4–6 mm/s. These adjustments were conducted under conditions of wheel speed ranging from 3000–4000 r/min and a cutting volume of 0.01-0.2 mm.