A 65-nm Delta-Sigma ADC-Based VDD-Variation-Tolerant Power-Side-Channel-Attack Sensor

This letter describes a delta-sigma ADC-based power-side-channel-attack sensor. Use of 64 sampling capacitors allows the use of over-sampling architecture even with a decoupling capacitor connected to the power supply. The LDO with low-leakage S/H is used as a driver for the integrator’s amplifier to minimize the offset error. A differential conversion method utilizing dual-integrate capacitors (CAPs) provides signal processing to compensate for drift due to supply voltage (VDD) variations. The prototype sensor chip fabricated in 65-nm CMOS has a worst-case detection accuracy of 98.7%, including VDD variations, for an insertion resistance > ${=}0.25~\Omega $ and a power consumption of $50~\mu $ W at 1.0-V operation.