A Second-Order Charge Pump Noise-Shaping SAR ADC

In this paper, a low-power, high-precision passive charge pump noise-shaping (NS) successive approximation register (SAR) analog-to-digital converter (ADC) is proposed for ultrasonic sensor applications in the Internet of Things (IoT). A residual voltage integration technique is introduced to realize a second-order noise transfer function (NTF), thereby achieving a trade-off between the power consumption and accuracy. To address the charge loss issue during the noise-shaping integration process, a charge pump (CP) voltage-multiplying principle is employed, which compensates for the charge loss to a certain extent. The proposed NS SAR ADC is implemented using a standard 180-nm CMOS process. Simulation results demonstrate that the circuit consumes 90.4μW under a 1.2V supply voltage at a sampling rate of 10MS/s. The proposed second-order NS SAR ADC achieves a signal-to-noise and distortion ratio (SNDR) of 87.55dB, an effective number of bits (ENOB) of 14.25bits, a Schreier figure of merit (FoMs) of 178dB.