Numerical Analysis of the CIBL Effect on Short-Circuit Characteristics of DG-CSTBTs with Reduced Mesa Width

As the mesa width of Trench Insulated Gate Bipolar Transistor (TIGBT) decreases, the Collector Bias Induced Barrier Lowering (CIBL) effect becomes increasingly severe, negatively impacting the device performance. In this paper, short-circuit characteristics of Carrier Stored Trench Bipolar Transistor with Dummy Gate (DG-CSTBT) with various mesa widths were studied by the Sentaurus TCAD. The simulation results indicate that reducing the mesa width leads to increasing saturation current. It is caused by the carrier injection enhancement effect because of the narrower mesa. In addition, the current unsaturation phenomena occur in the narrow mesa DG-CSTBT, which is attributed to the CIBL effect. The study shows, with the same ${V}_{\text{ce}}$, DG-CSTBT with narrower mesa exhibits wider depletion regions in Pbody, which can be interpreted as a reduction in channel length, the CIBL effect is induced. The short-circuit characteristics are degraded. Moreover, with appropriate ${P}_{\mathrm{b}}$ and ${T}_{\text{ox}}$, the CIBL effect in DG-CSTBT is suppressed and the short-circuit failure time is increased without increasing ${V}_{\text{th}}$.