Design of Efficient RAM Cell using Quantum-Dot Cellular Automata

This paper presents a novel Quantum Dot Cellular Automata (QCA)-based Random Access Memory (RAM) cell design that enhances output voltage performance using a loop structure with a D-latch and specialized multiplexer configurations. It discusses QCA's advantages over CMOS technology in terms of area and power dissipation, making it promising for digital memory design. Additionally, the paper explores power usage, fault tolerance, and polarization effects in QCA technology to optimize RAM cell performance. The comparison with the state of art show that the proposed RAM is highly area efficient as the design requires lesser number of QCA cells. Moreover, the proposed RAM cell is highly time efficient, the clock latency is observed to be only 1.25 clock cycles.