Preliminary Design Space Exploration for ASIC Implementation of Control Systems in Fault-Tolerant Quantum Computers

To realize a fault-tolerant quantum computer with a large number of qubits, a dedicated control system is essential. Achieving such a control system requires a quantitative eval-uation of bottlenecks and scalability, considering actual device implementations. In this presentation, we provide initial quan-titative evaluation results of power consumption, performance, and area for the back-end of the control system implemented using ASICs with CMOS technology across multiple technology nodes.