Impact of Pipelining on Low Power IoT applicable RISC-V ISA Core Micro-architectures

Internet of Things (IoT) edge devices are growing exponentially high in this modern era. Since the majority of IoT devices are battery-driven, the flawless design of ultra-low power processors is of utmost relevance. Low-power processor designs for IoT applications based on RISC-V ISA are gaining attraction in industry and academia due to their simple and extensible nature. Four different RISC-V cores based on different pipeline architectures are presented in this work. Herein, 2stage: a 2-stage pipelined RISC-V core; 3stage: a 3- stage pipelined RISC-V core; 4stage: a 4-stage pipelined RISC-V core; and HP 4stage: a high-performance 4-stage pipelined RISCV core are designed to support various arithmetic and control applications. Depending on the type of application, it is crucial to determine optimum pipelined RISC-V architectures. The cores were implemented on Xilinx Basys3 FPGA Board and their functionality and performance were critically evaluated. The physical design of these cores was carried out using Synopsys tools at UMC 65 nm technology node. The 3stage core achieved the highest Dhrystone benchmark score of 1.86 DMIPS/MHz. The designed 2stage, 3stage, and HP 4stage cores outperformed commercial cores like ARM Cortex-M4 (1.52 DMIPS/MHz), SiFive, and IBM6X86 in the Dhrystone benchmark score. 2stage attained the least area and dynamic power. Compared to HP 4stage, it achieves 1.7x and 1.5x improvements in area and power, but the operating frequency was lower. It was observed that with the increase in pipeline stages and the utilization of Dynamic Branch Prediction, the HP 4stage core achieved the highest operating frequency, which is 1.9x higher than the 2stage. The Figure of Merit (FoM) of all developed cores is assessed and 3stage RISC-V achieved maximum FoM. In conclusion, the critical comparison of ARM Cortex-M4 with the developed 2stage, 3stage, 4stage, and HP 4stage cores showed a reduction in dynamic power requirements by 72%, 66%, 60%, and 55% respectively. These newly designed cores are effectively suited for ultra-low-power IoT applications.