Structural Optimization Design and Simulation of a Novel Chip Level Electroosmotic Micromixer

Aiming at the problem that a variety of samples to be tested can be mixed efficiently and quickly, a new structure optimization design scheme of chip level electroosmotic micromixe with obstacle arrays and considering electroosmotic effect is proposed. Firstly, the chip level electroosmotic micromixer is modeled and simulated. Secondly, the mixing performance of chip level micromixers with obstacle array under the condition of non-electro osmotic and electroosmotic conditions is discussed. Finally, the parameters such as different shapes, different diameters, different lateral spacing and different electric field intensity of obstacle array in the chip level electro osmotic micromixer are simulated and analyzed. The simulation results show that the chip level electro osmotic micromixer is under the condition that the obstacle shape is circular, the diameter is 200 um, the lateral spacing is 300 um, and the electric field intensity applied by the AC electric field is ± 20V. the mixing efficiency index of the chip level electro osmotic micromixer is 45.23 % higher than that of the chip level non-electro osmotic micromixer with the same obstacle parameters, which enables a variety of samples to be tested to achieve efficient and rapid micro mixing.