A Digital Power Amplifier Based on Voltage-Control Linearization Technique

This paper presents a 10 GHz digital power amplifier (DPA) based on voltage-control linearization (VCL) technique in 65 nm bulk CMOS. The nonlinearity mechanisms are analyzed, and the VCL technique is adopted to push the transistors of on-state DPA cell into saturated region to suppress the nonlinearity. Besides, the transformer-based output matching network is utilized for high efficiency. The proposed DPA achieves maximum AM-AM distortion of $\pm 0.75\mathbf{dB}$ and maximum AM-PM distortion of 7.5°, and delivers a saturated power of 24.0 dBm with drain efficiency of 41.8% at 10 GHz.