Advanced Design and Optimization of CNTFET-Based SRAM Circuits Using a 180nm Process Design Ki

Static Random Access Memory (SRAM) is a critical component in modern micro-architectures, playing a pivotal role in Application-Specific Integrated Circuits (ASICs) and Systems on Chip (SoCs). This paper presents a novel SRAM design based on Carbon Nanotube Field-Effect Transistors (CNTFETs), used a 180nm Process Design Kit (PDK). A comprehensive PDK for 180nm CNTFETs has been developed, encompassing Parameterized Cells (Pcells), compact models, Design Rule Checking (DRC)/Layout Versus Schematic (LVS)/Parasitic Extraction (PEX) rules, and standard cell libraries, all of which are compatible with industry-standard Electronic Design Automation (EDA) tools. This work provides an important reference for the development of next-generation SRAM and other circuits utilizing CNTFET technology.