A Compact Elliptic Curve Cryptography Accelerator Over Prime Field for System-on-Chips

Elliptic Curve Cryptography (ECC) is widely adopted for secure communications due to its efficiency and ro-bust security features. Despite its benefits, ECC's computational intensity, especially over prime fields, poses integration challenges for cost-sensitive System-on-Chips (SoC). This paper proposes a compact accelerator tailored for elliptic curve arithmetic oper-ations over prime fields. Verified on the Xilinx Virtex-7 FPGA platform, this ECC accelerator achieves point multiplication on the NIST curve P-256 in 18.0 ms, operating at 156.9 MHz and utilizing only 589 slices. An ASIC implementation of the 384-bit version accelerator has been integrated into a metering SoC on a 22-nm CMOS process. Operating at 400 MHz, it can achieve point multiplication on the NIST curve P-256 in 7.1 ms and on the NIST curve P-384 in 10.7 ms, utilizing 31K gate equivalents. Its low gate count combined with high performance makes it a good solution for enhancing the security capabilities of cost-sensitive SoCs.