Simulation on Stacked Si Nanosheet nFETs with Dual-$k$ Spacers for Sub-2 nm-Node RF Applications (Invited)

This work presents an NEGF -based modeling and simulation framework for the evaluation of parasitic effects and RF performance in stacked Si nanosheet nFETs at the sub-2 nm technology node. By comprehensively examining the figures-of-merit such as $g_{\mathrm{m}}, g_{d},f_{\mathrm{T}}$ and $f_{\max}$, the roles of dual-k spacer, sheet width and crystal orientation are explored in the device design for potential RF and THz applications.