A 32-bit Two-step Incremental-ADC with 125.6 dB Dynamic-range for Non-invasive BCI Applications

This article presents a 32 -bit two-step incremental analog-to-digital converter (IADC) for non-invasive Brian-computer-interface (BCI). The prototype has been implemented with 180 nm BCD process at a supply voltage of 5 V, including a low-noise front-end PGA followed by an IADC. The simulation results shows the IADC achieves a signal-to-noise ratio (SNR) of 124.9 dB and a dynamic range (DR) of 125.6 dB, while consuming 2.95 mW of power, leading to a competitive figure-of-merit ($FoM_{S, D R}$) of $\mathbf{1 7 7 . 9} \mathrm{dB}$. The two-step architecture enables significant DR extension as well as power and area reduction, facilitating its widespread applications to multi-channel and high-accuracy wearable EEG acquisition with advanced tolerance to motion-artifacts.