Voltage Reference and Voltage Regulator for the Cryogenic Performance Evaluation of the 22nm FDSOI Technology

This paper presents the design and cryogenic electrical characterization of a voltage reference and a linear voltage regulator at temperatures between 6 K and 300 K. Both circuits are employed as test vehicles for the experimental performance evaluation of the 22 nm FDSOI MOS technology when used as platform for the development of cryogenic analog systems, whose role is relevant in Quantum Computing (QC) applications. Additionally, we report the impact that MOS transistor cryogenic phenomena have over these circuits and propose to take advantage of some of those phenomena in analog circuit design. In particular, we focus on the cryogenic threshold voltage $(V_{\text {th}})$ saturation, the transconductance $(g_{m})$ increase and the low frequency (LF) excess noise. Our experimental results indicate that the cryogenic $V_{\text {th}}$ saturation and the $g_{m}$ increase can be used as circuit design tools, while the LF excess noise is a performance handicap for cryogenic analog circuits.