A CMOS-Integrated Capacitor-Less N-LDO Featuring 1.2-1.8V Output Voltage Range and Low FOM for Edge Biomedical Device Applications

This paper introduces a capacitor-less n-type Low Dropout Regulator (LDO) designed to enhance transient response and expand the output voltage and current range, making it suitable for low-power biomedical System-on-Chip (SoC) applications. Utilizing a Recycling Folded Cascode (RFC) configuration to implement a common-mode feedback loop, this design improves the gain and bandwidth of the regulator. Additionally, the buffer used in this design is a Super Source Follower (SSF) with a pull-up capability structure that enhances the gate voltage of the power transistor Furthermore, an output voltage peak detection circuit is incorporated to implement a fast feedback loop, improving transient response and compensating for loop stability. The proposed LDO structure covers input voltages from 1.4V to 2.0V and generates an output voltage range from 1.2V to 1.8V with a dropout voltage of 200mV. This design is implemented using a $65-\mathrm{nm}$ CMOS process with an effective area of $0.0198 \mathbf{m m}^{2}$. Simulation results indicate that with an input voltage of 1.8V and an edge time of 400ns, during load current transitions from 1mA to 200mA, the recorded overshoot and undershoot values are 78mV and 54mV, respectively. The proposed LDO achieves a minimal Figure of Merit (FOM).