Contributions to Designing Undervoltage Lockout Circuits in p-GaN Gate Technology

This paper presents the main characteristics of four different UVLO (Undervoltage Lockout) circuits for monolithic integration in 650-V GaN-on-Si Schottky p-gate technology. The dispersion of the threshold values is measured and correlated with corner analysis and Monte Carlo simulation to analyze process variation. The objective is to achieve a design with low threshold value dispersion for mass production in an emerging GaN technology that exhibits significant variation in transistor threshold values and saturation current.