A Neural Network Solution for Logic Circuit Identification and Classification

This paper describes the research and development efforts that went into the design of a software solution capable of identifying and classifying logic gates and their connections from a circuit diagram drawn by hand. The system is based on a neural network model (YOLO) used for classification and relies on a series of steps to clean up the data. It is also capable of accurately detecting the hand drawn connections between the classified logic gates and creating an in-memory model of the drawn circuit, which it then uses to simulate its functioning. This could be very helpful in teaching activities (for a start) and maybe even in rapid circuit prototyping, if developed further. Throughout this paper, we present a few similar circuit classification works that we identified in the literature, describe the methodology employed in the classification and identification of the circuit elements and provide some details about the tests undertaken to evaluate the system's performance and their results.