A Unified Computational Storage and Memory Architecture in the CXL Era

Computational Storage Drives (CSDs) integrate compute engines directly within SSDs for efficient near-data processing. With the introduction of Compute Express Link (CXL), memory expanders can similarly become Computational Memory (CM) by offloading computations. However, the integration of specific hardware accelerators in CSDs has posed substantial mass production challenges, a pitfall we anticipate will also affect CM. To address this, we propose an innovative, decoupled architecture that uses CXL switches to separate accelerators from storage and memory devices. Our analysis suggests this architecture effectively sidesteps the anti-mass production issues faced by CSD and CM with an affordable (e.g., $< 20\%$) performance degradation.