A Hybrid Scrubber Based on the SEM and the PicoBlaze for Artix-7 FPGAs in the COMET Read-Out Electronics

When operating field-programmable gate arrays (FPGAs) in a radiation environment, single-event upsets (SEUs) induced in the configuration memory can alter the functionality of the firmware. This alteration can disrupt the correct operation of an FPGA. Even with a typical SEU mitigation design incorporated into the FPGA, unrecoverable errors can still occur, which can only be corrected by re-downloading FPGA firmware. In this study, we developed a Hybrid Scrubber Design that can correct multibit upsets (MBUs), which are one of the main causes of unrecoverable errors. The Hybrid Scrubber Design consists of the Advanced Micro Devices (AMD) soft error mitigation (SEM) and the AMD microprocessor (PicoBlaze). When a single-bit upset (SBU) occurs, the SEM in the FPGA corrects it in a short time. The FPGA communicates with an external computer only when an MBU occurs and then the PicoBlaze corrects it. We incorporated the Hybrid Scrubber Design into the FPGA on the readout electronics for the COherent Muon to Electron Transition (COMET) experiment. We conducted neutron irradiation tests and measured the unrecoverable error rate, which was calculated by dividing the observed number of unrecoverable errors by the neutron fluence. Compared to incorporating the SEM, which is a typical SEU mitigation design, the Hybrid Scrubber Design reduced the unrecoverable error rate by 80%.