Design of High-Reliability LDO Regulator Incorporated with Additional Parasitic Bipolar Junction Transistor for Low Voltage Applicaiton

To ensure stable operation and reliability of the LDO regulator, a protection circuit against ESD surges is necessary. This paper focuses on effectively operating the LDO regulator in response to varying load currents while enhancing circuit reliability by integrating an ESD protection circuit at the IC level. The proposed LDO regulator achieves high reliability due to the inclusion of the ESD protection circuit. This is achieved by incorporating an LVTSCR-based ESD protection circuit in both the I/O and power clamps. Measurement results of the proposed circuit demonstrate that the LDO regulator can control the output voltage in response to changes in load current while maintaining voltage stability during ESD events. The LDO regulator, combined with the ESD protection circuit, was implemented using a 0.18 μm BCD process and maintained an undershoot of 13 mV and an overshoot of 49 mV at a load current of 100 mA.