D-band Low Noise Amplifier with Improved Linearity in 90-nm BiCMOS9HP Process

In this paper, a D-band (110–170 GHz) low noise amplifier (LNA) for next-generation communications utilizing a diode-based adaptive bias circuit was implemented in a 90-nm SiGe BiCMOS 9HP process. The LNA is composed of three-stage common emitter (CE) and cascode (CC) structure. The adaptive bias circuit as the base bias of the output stage improves linearity compared to conventional resistor bias circuits, while preserving the gain and noise figure (NF) performances. The designed LNA exhibited a peak gain of 19.5 dB at 130 GHz, a minimum NF of 6.5 dB at 121 GHz, and a dc power consumption of 14.3 mW. The 3-dB bandwidth ranges from 110 to 146 GHz. Compared to the resistor bias circuit, the adaptive bias circuit shows a 4 dBm improvement in IP1dB.