Design of Phase-locked Loop Based on Filter-Enhanced Double Third-order Generalized Integrator

Large-scale grid-connection of new energy generators requires reliable grid synchronization signals, while phase-locked loop (PLL) technology is a universal method to detect these signals from the power grid due to its accuracy and high speed. However, the common PLL technology can only work in ideal grid conditions due to the lack of anti-interference capability. Hence, a filter-enhanced PLL technology is proposed to eliminate disturbances so as to realize stable phase-detection in non-ideal grid conditions. Firstly, the improved structure of the PLL technology is proposed. Subsequently, the model of the proposed PLL technology is built to analyze its filtering performance and the parameters of the controller are obtained accordingly. Finally, an environment of simulation is designed to test the performance of the proposed PLL technology. Additionally, an interference resistance experiment is conducted to verify the effectiveness of the proposed PLL technology in practical applications.