Design of an 8 Bit 1 GSPS Flash ADC with a Latency Induced Thermometric to Binary Encoder

In this article a 8 bit 1GHz Flash ADC is proposed. Analog front end of the flash ADC consists of Threshold-Inverter-Quantizer (TIQ) based comparators. The digital backend consists of a novel thermometric to binary encoder, capable of performing at required sampling speed without loss of any linearity. Unlike the multiplexer based implementation of thermometric to binary encoder, the present encoder design is based on increasing the latency, without compromising on the throughput. Such latency is inserted in the encoder design by using a 7-step time sampling of digital data. Time sampling is performed using simple D-FFs, which all operate at a sampling speed of 1 GSPS. Using a MUX based 255-to-8 bit thermometric to binary encoder in a flash ADC with TIQ based comparators provide only 5.57 bits of effective number of bits (ENOB) at a sampling speed of 1 GSPS. Whereas the proposed encoder when used in the similar flash ADC topology, improves the ENOB to 7.013 bits. The latency of the ADC output is found to be 3.5 clock cycles.