Rapid Prototyping Platform for Integrated Circuits for Quantum Computing

This paper describes a digital framework that enables rapid prototyping of mixed-signal CMOS circuits to be operated at cryogenic temperatures down to a few Kelvin. The resulting shorter iteration cycles allow us to verify circuit performance more frequently, which is crucial due to the lack of adequate CMOS models at cryogenic temperatures. The framework combines a JTAG programming and a chip-to-chip communication interface as well as a RISC-V processor with 64 kB of SRAM memory. Internally, mixed-signal circuits under test can be connected using predefined interfaces, allowing for flexible configuration at runtime. We used this concept to submit two designs in a 22 nm fully depleted silicon-on-insulator (FDSOI) technology for the integration with quantum bits (qubits): a cryogenic digital-to-analog converter as well as a readout circuit optimized for electron-spin qubits. Digital performance is verified using measurements at room temperature as well as at cryogenic temperatures.