Electrical Chip-Package-Board Reliability of 2.5-D/3-D HI Packaged Systems: A Perspective

To meet the growing demand for integrated circuits (ICs) in increasingly complex and demanding applications, the semiconductor industry has evolved dramatically during the past few decades. Automotive, space, and avionic electronics have different mission profiles and must survive harsh environmental conditions, requiring highly reliable specialized packaging such as 2.5-D/3-D heterointegration (HI) for greater functionality, device density, and speed. In these applications, cross-coupled chip-package-board interactions (CPBIs) result from the proximity of a wide variety of active and passive components and material stacks and processes. This article highlights the critical electrical reliability challenges of electronics employed in harsh environments. We emphasize the need for and discuss a physics-based generalization of effective medium theory (EMT) to quantify the transport of cross-coupled stressors such as heat, moisture, and ions/charge across the IC [front end of line (FEOL)/back end of line (BEOL)], package (bumps, interposers, and substrate), and PCB by considering complex CPBIs and ambient conditions [e.g., relative humidity (RH) and temperature (T)]. We also demonstrate how thermal, electrical, and chemical stresses can propagate across die/package boundaries, causing die-level [negative-bias thermal instability (NBTI), hot carrier injection (HCI), and BEOL electromigration (EM)] and package-level failure (dielectric breakdown, wire-bond/bumps electrochemical failure, and so on). Our study provides deep insights into the electrical reliability challenges typical of a 2.5-D/3-D packaged IC and offers potential solution schemes to ensure reliable IC operation under the most stringent conditions.