A Programmable and Reconfigurable CMOS Analog Hopfield Network for NP-Hard Problems

Analog Hopfield networks perform continuous energy minimization, leading to efficient and near-optimal solutions to nonpolynomial (NP)-hard problems. However, practical implementations suffer from scaling and connectivity issues. A programmable and reconfigurable analog Hopfield network is presented that addresses these challenges through a reconfigurable Manhattan architecture with a high-precision 14-bit floating-gate (FG) compute-in-memory (CiM) fabric. The network is implemented on a field programmable analog array (FPAA) and experimentally tested on three different NP-hard problems with different scaling challenges: Weighted Max-Cut (high connectivity and weight precision), traveling salesman problem (TSP) (high connectivity and medium weight precision), and Boolean Satisfiability/3SAT (low connectivity and weight precision) where it solved each problem optimally in microseconds.