Reducing Crosstalk in Monolithic-3-D Structures Using a Graphene Shielding Layer

This study fabricated monolithic-3-D (M3D) stacked devices at low temperatures using transition metal dichalcogenide-based field-effect transistor (FET). Crosstalk issues between layers were quantitatively assessed and mitigated by introducing graphene shielding layers. The upper gate FET structure comprised a MoS2 channel and an Al2O3 gate oxide, integrated within a two-tier M3D framework using SiO2-based interlayer dielectric (ILD). A graphene shielding layer was inserted between the ILDs to observe variations in crosstalk relative to ILD thickness and the presence of graphene due to the exacerbation of crosstalk with thinner ILDs. A parameter analyzer measured the operating voltages of the one- and two-tier devices. The parameters of the one-tier device varied with the ON/OFF state of the one-tier device, with crosstalk influenced by ILD thickness and the presence of the graphene layer. The back-gate effect induced by ILD thickness also affected the threshold voltage, subthreshold swing, and on-current. Furthermore, an electromagnetic interference (EMI) shielding test platform was fabricated on a print circuit board (PCB), and S-parameter measurements were conducted. The shielding efficiency of graphene was assessed across various frequency ranges to quantitively evaluate its effectiveness in blocking EMI at high frequencies. The results confirmed that the graphene layer significantly reduced crosstalk. The proposed technology is anticipated to advance the development of high-performance M3D devices and enhance the practicality and reliability of emerging process applications.