A Method for PWM Frequency Harmonic Suppression Using Zero-Vector Switching SVPWM Strategy in Three-Level Inverter Drive Systems

This paper proposed an innovative single-edge SVPWM strategy for the three-level three-phase voltage source inverters(VSIs), which could suppress the harmonics around PWM frequency. The technical principle and phase voltage harmonic formula of the conventional three-level single-edge SVPWM are illustrated and analyzed based on research of the working principle in the diode-clamped three-level inverter. By optimize the vector synthesis order of conventional single-edge regular sampling SVPWM technology, a novel zero-vector switching SVPWM(ZSSVPWM) technology is proposed. The technical principle and implementation process of this proposed three-level ZSSVPWM are discussed and analyzed in detail. At last, simulation and experimental results verified its suppression effect on the PWM harmonics, and compared the harmonic characteristics of this strategy with different modulation ratios.