DTCO of advanced FDSOI CMOS technology by process emulation

this paper presents a methodology of DTCO (Design-Technology Co-Optimization) for advanced FDSOI CMOS technology based on process emulation. By combining process emulation for the generation of 3D structures, TCAD and SPICE simulations, integrated circuit (IC) performance can be estimated. This work, based on realistic devices taking into account integration flow and interconnects topologies (multilayer dielectrics, contact etching form, etc.) offers a large range of technological and device parameters study. We illustrate the interest of this approach by specifically studying the effect of interconnect oxides permittivity on the performance of a ring oscillator (RO).