Modeling of Trap Generation in 3-D NAND Charge Trap Flash Memory

The Reaction-Diffusion-Drift (RDD) framework, implemented in both Sentaurus TCAD and standalone 1-D versions, is used to simulate Program/Erase (P/E) cycling related Tunnel Oxide Trap Generation (TO-TG) in Charge Trap Flash (CTF) NAND. The TCAD version uses NAND string as a device structure and bipolar bias for cycling, but is limited in the P/E cycle count due to computational time overhead. The 1-D version has an identical trap generation model as in TCAD, but it uses unipolar pulse for calibration with TCAD bipolar P/E results and extrapolate to high P/E cycle counts. The simulated TO-TG density is incorporated in the Activated Barrier Double Well Thermionic Emission (ABDWT) model to calculate post-cycling data retention (DR) loss. Experimental DR data are reproduced.