Modeling of SOI-MOSFET with Trap-Rich Substrate for RF Circuit Design

Many efforts have been undertaken to reduce the substrate-coupling effect in RF circuits. It has been demonstrated that a trap-rich layer underneath the BOX can reduce drastically undesired harmonic distortions (HDs), thus maintaining desired signal integrity. To utilize this technology, a newly developed compact model considers the trap charge based on its physics and is implemented into HiSIM_SOI, which solves the whole potential distribution within the device iteratively. The Fermi energy modeling as a function of trap density (Ntrap) is one of the keys for the achieved consistent modeling. It is also demonstrated that the trap charge improves the linearity of the induced potential characteristics during device operation, resulting in a HD reduction.