Patterning process and electrical yield optimization at the limits of single exposure EUV 0.33 NA: a pitch 26nm damascene process

In this work we have developed a single layer short loop damascene process to evaluate and optimize patterning performance of pitch 26nm single exposure 0.33 NA EUV. An electrical readout of 1m long meanders and forks-forks is used to compare the different processes and evaluate the amount of resist defects leading to shorts or opens. For the best process a full wafer combo yield of 99.7% is achieved (edge excluded) equivalent to 12defects/cm²