A Novel Approach to Implement a 4-Bit Vedic Multiplier Using Reversible Techniques

Reversible logic is pivotal in the realm of low-power computing as it eliminates power dissipation associated with information loss, a critical factor in modern electronics where energy efficiency is paramount. The importance of reversible logic extends to quantum computing, where reversible operations are essential for the construction of quantum gates and circuits. Adders play a crucial role in multipliers, especially in digital signal processing (DSP) applications. Vedic multiplication using the Urdhva Triyambakam method is an ancient Indian technique that performs multiplication by vertically and crosswise combining digits. In this research work, the design and implementation of a 4x4 reversible gate known as an ASK gate is presented. This gate is subsequently utilised in the construction of a full adder as well as a 4-bit Vedic multiplier. In terms of factors such as garbage outputs(GO), ancilla input(AI), and the number of gates (GC) that are utilised, the design that was developed performs better than earlier designs.