Applying Formal Methods to Maximize Power Efficiency in Embedded Architectures

With the increasing demand to make electronics ever smaller and more electricity efficient, embedded systems architectures have continued to evolve requiring new techniques for ensuring power efficiency of devices. The basic approach of this painting is to introduce how formal strategies have been used to improve energy performance on embedded architectures. Model-based strategies are used to edition architectural behavior and characteristics, crash protection, predictability through engineering verification (either by workflow or simulation), power performance. The power architectural structure and consumption are optimized by making powerful trade-offs between cost and space efficiency using the results of formal methods. The method proposed in this work is suitable for a wide range of embedded systems architectures and can easily be adapted to be implemented elsewhere on different structures. Although the paintings were not used to produce any software in colors and also have merits for these classes, this formal method can be a money-saver of energy consumption during the embedded systems development process with a reliability and performance guarantee.