A GRANDAB Decoder with 8.48 Gbps Worst-Case Throughput in 65nm CMOS

We present an error correction code (ECC) decoder based on the Guessing Random Additive Noise Decoding (GRAND) with ABandonment (GRANDAB) algorithm for applications that require constant throughput and fixed decoding latency in the Gbps range. This high constant throughput distinguishes our work from other GRAND decoders with similar average throughput, but with orders of magnitude longer worstcase latency. By leveraging the regularity, simplicity, and inherent parallelism of GRANDAB, our design maintains competitive area- and energy-efficiency. In 65 nm CMOS, we demonstrate our appoach with the BCH-(127,106) code. The ASIC implementation results show that, with a core area of $6.15 \mathrm{~mm}^{2}$, our decoder maintains a fixed (best-and worst-case) throughput of 8.48 Gbps with an energy consumption of $17.5 \mathrm{pJ} / \mathrm{bit}$ at 1.25 V and 3.71 Gbps with $5.7 \mathrm{pJ} / \mathrm{bit}$ at 0.75 V.