Single Die Process Using Shadow Masks for a 55µm Fine Pitch Array of 4µm-Tall Indium Bumps Across an Entire Chip

Large area detectors for X-ray science, high energy physics and other radiation applications are generally assembled from multiple hybridized sensor/read-out chip modules. To minimize the dead area between these modules, the detector pixel arrays on sensor and read-out chips extended to the periphery of each chip. Conventionally sensors and read-out chips such as Application-Specific Integrated Circuits (ASIC) are processed on wafers using photolithography. A lift-off process is used to create arrays of tall indium bumps (∼5µm) for interconnects between sensor and ASIC. After the lift-off process, individual chips are commonly diced from these wafers followed by flip-chip bonding of sensors and ASICs. However, wafer-scale processes are often not suitable for small scale production, R&D processes, and specific detector materials such as CdZnTe that is typically provided as individual die. As an alternative to wafer-scale production, small numbers of single dies are processed for interconnect deposition and flip-chip bonding. For dies with large pixel pitch (∼250µm), printing arrays of epoxy-based silver (Ag) dots is suitable for forming flip-chip interconnects, but this process has limitations and requires gold (Au) studs on the pairing ASIC array. For smaller pixel pitch, indium bumps are desirable and have also the advantage that a cold-welding at room temperature can be used for flip-chip bonding. Forming indium bumps on single die with lift-off photolithography is not trivial when the array expands to the periphery of the die. Due to surface tension an edge bead of the photoresist (PR) builds up creating a non-uniform PR thickness across the die which impedes the formation of uniform PR openings. Using a shadow mask instead of the PR is a suitable alternative for processing a single die. The mask is mechanically aligned and placed over the die and removed after the indium deposition. Electroformed and etched shadow masks with different thickness and aperture openings were tested for the indium deposition on single chip dies. Ultimately, we demonstrate an array of 4µm-tall indium bumps on a pixel pitch of 55µm. This fine pitch is essential for X-ray radiation detectors, such as Medipix, which utilize ASICs in a 256 × 256-pixel array for scientific applications. This shadow mask process is not only useful for minimizing the dead area between chip modules in edgeless radiation detectors, but also for other applications where samples do not sustain standard lithography procedures or when processing of single dies is required.