Dynamic Precision Scaling in MAC Units for Energy-Efficient Computations in Deep Neural Network Accelerators

In deep neural network (DNN) accelerators, balancing computational performance and energy efficiency is critical, particularly for deployment on resource-constrained platforms such as FPGAs. This paper introduces a novel approach leveraging Dynamic Precision Scaling (DPS) in Multiply-Accumulate (MAC) units to enhance energy efficiency and computational flexibility in DNN accelerators. By dynamically adjusting the precision of MAC operations among 2-bit, 4-bit, 8-bit, and 16-bit fixed and floating-point representations, DPS MAC units optimize resource utilization and power consumption in accordance with the specific demands of the workload. The proposed DPS MAC units were implemented on an FPGA and evaluated for resource utilization, power consumption, and computational efficiency. The results were achieved by employing lower precision for non-critical operations and higher precision for critical computations, optimizing the trade-off between accuracy and computational overhead. The experimental evaluations revealed that DPS MAC units can effectively reduce power consumption and improve computational efficiency compared to conventional fixed-precision MAC units. For instance, in convolutional layers, where the bulk of computational effort lies, the ability to dynamically switch precision enabled significant reductions in energy usage without compromising the overall accuracy of the neural network. The flexible precision scaling proved advantageous in fully connected layers, where higher precision might be required for final classification tasks. These designs are analyzed and simulated by using the Vivado 2021.2 tool and implemented on the ZYNQ 7000 series PYNQ Z2 development board (xc7z020clg400-1).