MCSSA: A Stream-Based Multiconcurrency Systolic Sorting Array Combining Merge Tree

The exploration of utilizing reconfigurable circuits with parallel computing capabilities has been conducted to enhance sorting performance and reduce power consumption. However, most sorting algorithms using dedicated processors are based on parallelization designs of serial algorithms without considering the design method of large-scale integrated circuits. This results in various issues, including the overuse of $I/O$ interface resources, on-chip storage resources, and complex layout wiring. In this article, we extend the 2-tuple relation in the uniform recurrence equation (URE) structure used to define the systolic array to n-tuples, and the extended structure is flexible in defining $I/O$ bandwidth and concurrency. Then we define the multiconcurrency systolic sorter array (MCSSA) algorithm based on the extended URE structure, which has a flexible $4N/n$ time complexity based on the n-tuple relation. Moreover, this systolic array can simultaneously sort two independent sequences, increasing the reuse of resources. Afterwards, we encapsulate each n-tuple into a processing element (PE) cell. The entire MCSSA consists of these interconnected PE cells, each of which can be customized in terms of data bit width and type. Last but not least, we have improved the merge tree structure called MC-merge tree. The concurrency of this algorithm can also be flexibly defined, we use this algorithm combined with MCSSA to cope with large-scale sorting scenarios. In our experiments, we have demonstrated the speed-up ratio of MCSSA relative to other state of the art (SOTA) sorting algorithms. Inheriting the unity and simplicity from the Systolic Array architecture, MCSSA achieves a maximum $73.17\times $ acceleration ratio on the U200. In addition, the MC-merge tree expands the MCSSA sorting scale with a maximum of 450.56 times while maintaining the advantage of the acceleration ratio. The results of our study demonstrate that MCSSA and MC-merge tree have better acceleration, throughput and scalability advantages over other SOTA algorithms.