Zero-Drift Fully Differential Amplifier With Ping-Pong Auto-Zero Stabilization and Digitally-Assisted Coarse Automatic Offset Calibration

This brief presents a ping-pong auto-zero (AZ) stabilized multipath fully differential amplifier with a digitally-assisted coarse automatic offset calibration loop. The low-frequency path (LFP) of the multipath amplifier is implemented using ping-pong AZ amplifiers. The continuous-time offset cancellation and the frequency compensation can be obtained with ping-pong AZ scheme. The digitally-assisted automatic offset calibration loops (AOCL) in the LFP and the HFP (high-frequency path) using successive approximation registers (SAR) binary search circuits and current-mode digital-to-analog converters (DAC) can effectively reduce the offsets under large process variations. The AOCL can prevent the output saturation of AZ LFP at zeroing phase, can allow the higher transconductance of the AZ LFP. The higher gain of the AZ LFP can attenuate the low frequency noise of HFP, and the lower overall input referred noise can be achieved. The circuit was fabricated using a 180 nm complementary metal-oxide-semiconductor (CMOS) process and draws $59.9~\mu $ A at a supply voltage of 1.8V. The input referred noise is 19.8 nV/ $\surd $ Hz. The power-up time is $2.3~\mu $ s. The maximum input referred offsets before and after AOCL operation are reduced from $- 740~\mu $ V to −276 nV. The unit gain-bandwidth is 3.042 MHz. The power supply rejection ratio (PSRR) and common mode rejection ratio (CMRR) are 111 dB, and 99 dB, respectively.